Methods for forming III-V semiconductor device structures
US7838392B2 · kind B2 · utility
12Cited by
259References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 20, 2007 |
| Grant date | Nov 23, 2010 |
| Priority date | — |
| Expiry date | May 1, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/62
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.