Semiconductor wafer level interconnect package utilizing conductive ring and pad for separate voltage supplies and method of making the same
US7838395B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 6, 2007 |
| Grant date | Nov 23, 2010 |
| Priority date | — |
| Expiry date | Feb 26, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30105
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor die has active circuits formed on its active surface. Contact pads are formed on the active surface of the semiconductor die and coupled to the active circuits. A die extension region is formed around a periphery of the semiconductor die. Through hole vias (THV) are formed in the die extension region. A conductive plane or ring is formed in a center area on the active surface of the semiconductor die. The conductive plane or ring is coupled to a first contact pad for providing a first power supply potential to the active circuits. The conductive plane or ring is electrically connected to a first THV. A conductive ring is formed partially around a perimeter of the conduction plane or ring. The conductive ring is coupled to a second contact pad for providing a second power supply potential to the active circuits. The conductive ring is electrically connected to a second THV.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.