Semiconductor device having p-n column portion

US7838995B2 · kind B2 · utility

Assignee

• DENSO CORPORATION · JP

Inventors

• Yasushi Urakami · Amuru, UG
• Hitoshi Yamaguchi · Yokosuka, JP
• Jun Sakakibara · Tokyo, JP

Key dates

• Filing date: Jul 10, 2008
• Grant date: Nov 23, 2010
• Expiry date: Oct 29, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/252

Abstract

A semiconductor device includes: a first semiconductor layer; a p-n column portion over the first semiconductor layer and including second and third semiconductor layers, which are alternately arranged; and a peripheral portion adjacently to the p-n column portion and including a fourth semiconductor layer. An end second semiconductor layer has an impurity amount equal to or larger than a half of other second semiconductor layers. The third semiconductor layers include a large impurity amount portion adjacent to the end second semiconductor layer. The large impurity amount portion includes at least one third semiconductor layer having an impurity amount larger than an impurity amount of other third semiconductor layers.