Interconnection and input/output resources for programmable logic integrated circuit devices
US7839167B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 20, 2009 |
| Grant date | Nov 23, 2010 |
| Priority date | — |
| Expiry date | Jan 20, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17792
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A programmable logic integrated circuit device has a plurality of regions of programmable logic disposed on the device in a plurality of intersecting rows and columns of such regions. Interconnection resources (e.g., interconnection conductors, signal buffers/drivers, programmable connectors, etc.) are provided on the device for making programmable interconnections to, from, and/or between the regions. At least some of these interconnection resources are provided in two forms that are architecturally similar (e.g., with similar and substantially parallel routing) but that have significantly different signal propagation speed characteristics. For example, a major or larger portion of such dual-form interconnection resources may have what may be termed normal signal speed, while a smaller minor portion may have significantly faster signal speed. Secondary (e.g., clock and clear) signal distribution may also be enhanced, and so may be input/output circuitry and cascade connections between adjacent or nearby logic modules on the device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.