Patent · US Active

Resource mapping of functional areas on an integrated circuit

US7840919B1 · kind B1 · utility

3Cited by

8References

20Claims

0Family size

Assignee

XILINX, INC. · US

Inventors

Qiang Wang · Beijing, CN
Aaron Ng · San Jose, US
Rajat Aggarwal · Los Altos, US

Key dates

Filing date	Feb 1, 2008
Grant date	Nov 23, 2010
Priority date	—
Expiry date	Jun 5, 2029

Classification

Technology area (CPC G)Physics
CPC primaryG06F30/34
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

The availability of device resources of an IC are quantified for a circuit design by building a representation of resource sites for the IC. Initial availability values are assigned to the resource sites, and any components having locking constraints are identified and placed into their respective sites. From the remaining resource sites, candidate sites for a component of the circuit design are identified. The candidate sites are summed, and the initial availability values of the candidate sites are modified according to the sum.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.