Inventor · San Jose, CA, US

Aaron Ng

24Patents
6h-index
35Co-inventors
65Inventor score

Filing activity: Feb 1, 2008 → Aug 8, 2022

Most-cited inventions

PatentTitleAreaCited byStatus
US10192016B2 Neural network based physical synthesis for circuit designs Physics 42 Active
US10354733B1 Software-defined memory bandwidth reduction by hierarchical stream buffering for general matrix multiplication in a programmable IC Physics 17 Active
US11204747B1 Re-targetable interface for data exchange between heterogeneous systems and accelerator abstraction into software instructions Physics 12 Active
US10515135B1 Data format suitable for fast massively parallel general matrix multiplication in a programmable IC Physics 11 Active
US10460416B1 Inline image preprocessing for convolution operations using a matrix multiplier on an integrated circuit Physics 8 Active
US11222256B2 Neural network processing system having multiple processors and a neural network accelerator Physics 7 Active
US10943039B1 Software-driven design optimization for fixed-point multiply-accumulate circuitry Physics 6 Active
US10678509B1 Software-driven design optimization for mapping between floating-point and fixed-point multiply accumulators Physics 5 Active
US9836568B1 Programmable integrated circuit design flow using timing-driven pipeline analysis Physics 5 Active
US9646126B1 Post-routing structural netlist optimization for circuit designs Physics 5 Active
US10936311B1 Sparse matrix processing circuitry Physics 5 Active
US11568218B2 Neural network processing system having host controlled kernel acclerators Physics 4 Active
US7840919B1 Resource mapping of functional areas on an integrated circuit Physics 3 Active
US11620490B2 Multi-layer neural network processing by a neural network accelerator using host communicated merged weights and a package of per-layer instructions Physics 3 Active
US10366201B1 Timing closure of circuit designs for integrated circuits Physics 2 Active
US9965581B1 Fanout optimization to facilitate timing improvement in circuit designs Physics 2 Active
US10984500B1 Inline image preprocessing for convolution operations using a matrix multiplier on an integrated circuit Physics 2 Active
US11036827B1 Software-defined buffer/transposer for general matrix multiplication in a programmable IC Physics 2 Active
US11429848B2 Host-directed multi-layer neural network processing via per-layer work requests Electricity 2 Active
US11386644B2 Image preprocessing for generalized image processing Physics 1 Active
US12079158B2 Reconfigurable neural engine with extensible instruction set architecture Physics 0 Active
US12248786B2 Instruction set architecture for data processing array control Physics 0 Active
US11694066B2 Machine learning runtime library for neural network acceleration Physics 0 Active
US12412109B2 Machine learning deployment platform Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.