Semiconductor memory devices and methods of manufacturing the same
US7842570B2 · kind B2 · utility
1Cited by
3References
15Claims
0Family size
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Key dates
| Filing date | Jun 12, 2008 |
| Grant date | Nov 30, 2010 |
| Priority date | — |
| Expiry date | Dec 23, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B41/30
Abstract
In methods of manufacturing a memory device, a tunnel insulation layer is formed on a substrate. A floating gate having a substantially uniform thickness is formed on the tunnel insulation layer. A dielectric layer is formed on the floating gate. A control gate is formed on the dielectric layer. A flash memory device including the floating gate may have more uniform operating characteristics.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.