Albert Fayrushin
33Patents
4h-index
50Co-inventors
62Inventor score
Filing activity: Jun 12, 2008 → Oct 23, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7760550B2 | Methods of reading data from non-volatile semiconductor memory device | Physics | 21 | Active |
| US10937482B2 | Memory cells and arrays of elevationally-extending strings of memory cells | Electricity | 8 | Active |
| US9324727B2 | Memory devices having semiconductor patterns on a substrate and methods of manufacturing the same | Electricity | 7 | Active |
| US11362175B1 | Select gate gate-induced-drain-leakage enhancement | Electricity | 4 | Active |
| US10937904B2 | Programmable charge-storage transistor, an array of elevationally-extending strings of memory cells, and a method of forming an array of elevationally-extending strings of memory cells | Electricity | 3 | Active |
| US10803948B2 | Sequential voltage ramp-down of access lines of non-volatile memory device | Physics | 3 | Active |
| US11974430B2 | Microelectronic devices with dopant extensions near a GIDL region below a tier stack, and related methods and systems | Electricity | 2 | Active |
| US7842570B2 | Semiconductor memory devices and methods of manufacturing the same | Electricity | 1 | Active |
| US11201167B2 | Semiconductor pillars having triangular-shaped lateral peripheries, and integrated assemblies | Electricity | 1 | Active |
| US11127751B2 | Back gates and related apparatuses, systems, and methods | Electricity | 1 | Active |
| US11417396B2 | Sequential voltage ramp-down of access lines of non-volatile memory device | Physics | 1 | Active |
| US10943915B1 | Integrated memory having the body region comprising a different semiconductor composition than the source/drain region | Electricity | 0 | Active |
| US11424363B2 | Programmable charge-storage transistor, an array of elevationally-extending strings of memory cells, and a method of forming an array of elevationally-extending strings of memory cells | Electricity | 0 | Active |
| US11322516B2 | Microelectronic devices including isolation structures protruding into upper pillar portions, and related methods and systems | Electricity | 0 | Active |
| US11887667B2 | Select gate transistor with segmented channel fin | Electricity | 0 | Active |
| US12342544B2 | Apparatuses including band offset materials, and related memory devices | Electricity | 0 | Active |
| US12004351B2 | Integrated assemblies, and methods of forming integrated assemblies | Electricity | 0 | Active |
| US11790991B2 | Sequential voltage ramp-down of access lines of non-volatile memory device | Physics | 0 | Active |
| US12356617B2 | Microelectronic devices with vertically recessed channel structures and discrete, spaced inter-slit structures, and related methods and systems | Electricity | 0 | Active |
| US7968407B2 | Methods of manufacturing semiconductor memory devices | Electricity | 0 | Active |
| US12324154B2 | Microelectronic devices including pillars with partially-circular upper portions and circular lower portions, and related methods | Electricity | 0 | Active |
| US9082750B2 | Non-volatile memory devices having reduced susceptibility to leakage of stored charges | Electricity | 0 | Active |
| US11800717B2 | Microelectronic devices including isolation structures protruding into upper pillar portions, and related methods and systems | Electricity | 0 | Active |
| US11778824B2 | Apparatuses including band offset materials, and related systems | Electricity | 0 | Active |
| US11430809B2 | Integrated assemblies, and methods of forming integrated assemblies | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.