Method of making discrete trap memory (DTM) mediated by fullerenes

US7847325B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Gerhard Poeppel · Duggendorf, DE
• Georg Tempel · Zorneding, DE

Key dates

• Filing date: Mar 12, 2009
• Grant date: Dec 7, 2010
• Expiry date: Mar 12, 2029

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S977/773
• WIPO field: Micro-structural and nano-technology
• WIPO sector: Chemistry

Abstract

A discrete trap memory, comprising a silicon substrate layer, a bottom oxide layer on the silicon substrate layer, a Fullerene layer on the bottom oxide layer, a top oxide layer on the Fullerene layer, and a gate layer on the top oxide layer; wherein the Fullerene layer comprises spherical, elliptical or endohedral Fullerenes that act as charge traps.