Three dimensional NAND memory
US7848145B2 · kind B2 · utility
219Cited by
20References
13Claims
0Family size
Assignee
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Key dates
| Filing date | Mar 27, 2007 |
| Grant date | Dec 7, 2010 |
| Priority date | — |
| Expiry date | Jun 9, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A monolithic, three dimensional NAND string includes a first memory cell located over a second memory cell, a select transistor, a first word line of the first memory cell, a second word line of the second memory cell, a bit line, a source line, and a select gate line of the select transistor. The first and the second word lines are not parallel to the bit line, and the first and the second word lines extend parallel to at least one of the source line and the select gate line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.