Nima Mokhlesi
181Patents
35h-index
44Co-inventors
86Inventor score
Filing activity: Sep 14, 2000 → Oct 20, 2016
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8045391B2 | Non-volatile memory and method with improved sensing having bit-line lockout control | Physics | 416 | Active |
| US7575973B2 | Method of making three dimensional NAND memory | Electricity | 328 | Active |
| US7851851B2 | Three dimensional NAND memory | Electricity | 226 | Active |
| US7514321B2 | Method of making three dimensional NAND memory | Electricity | 221 | Active |
| US7848145B2 | Three dimensional NAND memory | Physics | 219 | Active |
| US7745265B2 | Method of making three dimensional NAND memory | Electricity | 217 | Active |
| US7808038B2 | Method of making three dimensional NAND memory | Electricity | 217 | Active |
| US7068539B2 | Charge packet metering for coarse/fine programming of non-volatile memory | Physics | 191 | Expired |
| US7002843B2 | Variable current sinking for coarse/fine programming of non-volatile memory | Physics | 126 | Expired |
| US7139198B2 | Efficient verification for coarse/fine programming of non-volatile memory | Physics | 122 | Expired |
| US6345001B1 | Compressed event counting technique and application to a flash memory system | Physics | 106 | Expired |
| US7342831B2 | System for operating non-volatile memory using temperature compensation of voltages of unselected word lines and select gates | Physics | 104 | Active |
| US7310272B1 | System for performing data pattern sensitivity compensation using different voltage | Physics | 102 | Active |
| US7633802B2 | Non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages | Physics | 93 | Active |
| US7113432B2 | Compressed event counting technique and application to a flash memory system | Physics | 90 | Expired |
| US7508710B2 | Operating non-volatile memory with boost structures | Physics | 86 | Active |
| US7440324B2 | Apparatus with alternating read mode | Physics | 81 | Active |
| US7154779B2 | Non-volatile memory cell using high-k material inter-gate programming | Electricity | 80 | Expired |
| US7450421B2 | Data pattern sensitivity compensation using different voltage | Physics | 78 | Active |
| US7904793B2 | Method for decoding data in non-volatile storage using reliability metrics based on multiple reads | Electricity | 78 | Active |
| US7020026B2 | Bitline governed approach for program control of non-volatile memory | Physics | 77 | Expired |
| US7590002B2 | Resistance sensing and compensation for non-volatile storage | Physics | 71 | Active |
| US6850441B2 | Noise reduction technique for transistors and small devices utilizing an episodic agitation | Physics | 70 | Expired |
| US7049652B2 | Pillar cell flash memory technology | Physics | 69 | Expired |
| US7551477B2 | Multiple bit line voltages based on distance | Physics | 68 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.