Circuit to control voltage ramp rate
US7848151B2 · kind B2 · utility
12Cited by
13References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 5, 2009 |
| Grant date | Dec 7, 2010 |
| Priority date | — |
| Expiry date | Mar 5, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A programming circuit and method to apply a controlled or predetermined voltage pulse for charge transfer to or from the floating gate of a non-volatile memory cell in an incremental manner to control the overall voltage across the gate oxide. Voltage above a transfer threshold voltage, such as above a tunneling threshold voltage, is applied in a stepwise charge transfer manner to or from the floating gate up to a voltage limit that is below the thin oxide damage threshold. Controlling the overall voltage avoids oxide breakdown and enhances reliability.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.