Alan Renninger
11Patents
5h-index
15Co-inventors
55Inventor score
Filing activity: Nov 30, 2000 → Jul 13, 2009
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7848151B2 | Circuit to control voltage ramp rate | Physics | 12 | Active |
| US7512008B2 | Circuit to control voltage ramp rate | Physics | 9 | Expired |
| US7423912B2 | SONOS memory array with improved read disturb characteristic | Physics | 9 | Active |
| US6479351B1 | Method of fabricating a self-aligned non-volatile memory cell | Electricity | 8 | Expired |
| US6624027B1 | Ultra small thin windows in floating gate transistors defined by lost nitride spacers | Electricity | 6 | Expired |
| US6624029B2 | Method of fabricating a self-aligned non-volatile memory cell | Electricity | 4 | Expired |
| US7560334B2 | Method and system for incorporating high voltage devices in an EEPROM | Electricity | 2 | Expired |
| USRE40486E1 | Self-aligned non-volatile memory cell | General | 1 | Expired |
| US6841823B2 | Self-aligned non-volatile memory cell | Electricity | 1 | Expired |
| US7037786B2 | Method of forming a low voltage gate oxide layer and tunnel oxide layer in an EEPROM cell | Electricity | 0 | Expired |
| US8093640B2 | Method and system for incorporating high voltage devices in an EEPROM | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.