Integrated circuit, method of manufacturing an integrated circuit, and memory module
US7855435B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 12, 2008 |
| Grant date | Dec 21, 2010 |
| Priority date | — |
| Expiry date | Dec 1, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/1675
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one embodiment of the present invention, an integrated circuit including a plurality of memory cells is provided. Each memory cell includes a resistivity changing memory element which includes a top electrode, a bottom electrode, and resistivity changing material being disposed between the top electrode and the bottom electrode. Each resistivity changing memory element is at least partially surrounded by a thermal insulating structure. The thermal insulating structures are arranged such that the dissipation of heat generated within the resistivity changing memory elements into the environment of the resistivity changing memory elements is lowered.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.