Integrated circuit package system employing an offset stacked configuration
US7872340B2 · kind B2 · utility
5Cited by
13References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 29, 2008 |
| Grant date | Jan 18, 2011 |
| Priority date | — |
| Expiry date | Jan 30, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing an integrated circuit package system includes: providing a base package including a first integrated circuit coupled to a base substrate by an electrical interconnect formed on one side; and mounting an offset package over the base package, the offset package electrically coupled to the base substrate via a system interconnect.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.