Filtering and remapping interrupts
US7873770B2 · kind B2 · utility
15Cited by
18References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 13, 2006 |
| Grant date | Jan 18, 2011 |
| Priority date | — |
| Expiry date | Feb 28, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/206
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment, an input/output memory management unit (IOMMU) comprises a control register and control logic coupled to the control register. The control register is configured to store a base address of a device table, wherein a given input/output (I/O) device has an associated device identifier that selects a first entry in the device table. The first entry comprises a pointer to an interrupt remapping table. The control logic is configured to remap an interrupt specified by an interrupt request received by the IOMMU from the given I/O device if the interrupt remapping table includes an entry for the interrupt.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.