Integrated circuit including a first gate stack and a second gate stack and a method of manufacturing

US7875516B2 · kind B2 · utility

Assignee

• Qimonda AG · DE

Inventors

• Roman Knoefler · Villach, AT
• Michael Specht · Munich, DE
• Josef Willer · Riemerling, DE

Key dates

• Filing date: Sep 14, 2007
• Grant date: Jan 25, 2011
• Expiry date: Mar 23, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/038

Abstract

An integrated circuit including a first gate stack and a second gate stack and a method of manufacturing is disclosed. One embodiment provides non-volatile memory cells including a first gate stack and a gate dielectric on a first surface section of a main surface of a semiconductor substrate, and a second gate stack including a memory layer stack on a second surface section. A first pattern is transferred into the first gate stack and a second pattern into the second gate stack.