Logic circuit and method for calculating an encrypted result operand

US7876893B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Antoine Degrendel · Munich, DE
• Winfried Kamp · Munich, DE
• Manfred Roth · Munich, DE
• Thomas Kodytek · Munich, DE

Key dates

• Filing date: Aug 3, 2006
• Grant date: Jan 25, 2011
• Expiry date: Sep 22, 2029

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F2207/7266
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A logic circuit for calculating an encrypted dual-rail result operand from encrypted dual-rail input operands according to a combination rule includes inputs for receiving the input operands and an output for outputting the encrypted result operand. Each operand may comprise a first logic state or a second logic state. The logic circuit comprises a first logic stage connected between the inputs and an intermediate node and a second logic stage connected between the intermediate node and the output. The logic stages are formed to calculate the first or second logic state of the encrypted result operand from the input operands according to the combination rule and to maintain or change exactly once the logic state of the encrypted result operand, independently of an order of arrival of the encrypted input operands, depending on the combination rule, in order to impress the calculated first logic state or second logic state on the output.