Apparatus for pipelined cyclic redundancy check circuit with multiple intermediate outputs
US7886210B2 · kind B2 · utility
2Cited by
4References
10Claims
0Family size
Assignee
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Key dates
| Filing date | Feb 9, 2007 |
| Grant date | Feb 8, 2011 |
| Priority date | — |
| Expiry date | Dec 10, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/09
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A CRC redundancy calculation circuit is presented which is pipelined to run at high frequencies and configured to operate on an arbitrary multiple of the base granularity of the data packet. Additionally, the CRC redundancy calculation circuit provides the same multiple of outputs that provide intermediary output remainder values. Thus, for example, a circuit which processes 24 bytes of packet data per cycle and which the packets have a 4 byte granularity, the CRC redundancy calculation circuit provides 6 output remainder values, one for each 4 byte slice of data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.