Methods for identifying failing timing requirements in a digital design
US7886246B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 16, 2008 |
| Grant date | Feb 8, 2011 |
| Priority date | — |
| Expiry date | May 9, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/3312
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods for identifying failing timing requirements in a digital design. The method includes identifying at least one timing test in the digital design that has a passing slack in a base process corner and a failing slack in a different process corner. The method further includes computing a sensitivity of the failing slack to each of a plurality of variables and comparing each sensitivity to a respective sensitivity threshold. If the sensitivity of at least one of the variables is greater than the respective sensitivity threshold, then the at least one timing test is considered to fail.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.