Method for verifying mask pattern data, method for manufacturing mask, mask pattern verification program, and method for manufacturing semiconductor device
US7890908B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 22, 2006 |
| Grant date | Feb 15, 2011 |
| Priority date | — |
| Expiry date | Jun 24, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F1/36
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for verifying mask pattern data includes preparing design circuit data on a design circuit which realizes a desired electrical operation. Data on a design circuit pattern having a structure which realizes the design circuit on a semiconductor substrate is prepared. Mask pattern data on a pattern of a mask used in order to produce the design circuit pattern is prepared. A circuit pattern which is to be obtained by processing a film using the pattern of the mask indicated by the mask pattern data is acquired. Circuit data on a circuit realized by at least a first part of the circuit pattern is produced. A circuit mismatch part where the circuit data and a part of the design circuit data which corresponds to the first part of the circuit pattern do not match up is detected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.