Patent · US Active

Using Multi-Layer/Multi-Input/Multi-Output (MLMIMO) models for metal-gate structures

US7894927B2 · kind B2 · utility

19Cited by
2References
32Claims
0Family size

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Inventors

Key dates

Filing dateAug 6, 2008
Grant dateFeb 22, 2011
Priority date
Expiry dateSep 16, 2029

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

The invention provides a method of processing a wafer using multilayer processing sequences and Multi-Layer/Multi-Input/Multi-Output (MLMIMO) models and libraries that can include one or more measurement procedures, one or more Poly-Etch (P-E) sequences, and one or more metal-gate etch sequences. The MLMIMO process control uses dynamically interacting behavioral modeling between multiple layers and/or multiple process steps. The multiple layers and/or the multiple process steps can be associated with the creation of lines, trenches, vias, spacers, contacts, and gate structures that can be created using isotropic and/or anisotropic etch processes.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.