Dual insulating layer diode with asymmetric interface state and method of fabrication
US7897453B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 16, 2008 |
| Grant date | Mar 1, 2011 |
| Priority date | — |
| Expiry date | Feb 24, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8845
Abstract
An integrated circuit including vertically oriented diode structures between conductors and methods of fabricating the same are provided. The diode is a metal-insulator diode having a first metal layer, a first insulating layer, a second insulating layer and a second metal layer. At least one asymmetric interface state is provided at the intersection of at least two of the layers to increase the ratio of the diode's on-current to its reverse bias leakage current. In various examples, the asymmetric interface state is formed by a positive or negative sheet charge that alters the barrier height and/or electric field at one or more portions of the diode. Two-terminal devices such as passive element memory cells can utilize the diode as a steering element in series with a state change element. The devices can be formed using pillar structures at the intersections of upper and lower conductors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.