Semiconductor chip with chip selection structure and stacked semiconductor package having the same
US7898834B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 31, 2008 |
| Grant date | Mar 1, 2011 |
| Priority date | — |
| Expiry date | Dec 12, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/014
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor chip with a chip selection structure suitable for a stacked semiconductor chip includes a semiconductor chip body and a chip selection structure. The chip selection structure includes a chip selection pad disposed over the semiconductor chip body, a main through electrode electrically connected to the chip selection pad, and a sub through electrode interposed between the main through electrode and the chip selection pad. A plurality of the semiconductor chips, each having the same chip selection structure, can be stacked by offsetting the stacked semiconductor chips.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.