Patent · US Active

Dynamically reconfigurable shared scan-in test architecture

US7900105B2 · kind B2 · utility

15Cited by
26References
35Claims
0Family size

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Key dates

Filing dateMay 12, 2010
Grant dateMar 1, 2011
Priority date
Expiry dateMay 12, 2030

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01R31/318536
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.