Integrated circuit comprising mirrors buried at different depths

US7902621B2 · kind B2 · utility

Assignee

• STMicroelectronics SA

Inventors

• Perceval Coudrain · Grenoble, FR
• Philippe Coronel · Barraux, FR
• Michel Marty · Buc, FR
• Matthieu Bopp · Fortschwihr, FR

Key dates

• Filing date: Mar 5, 2009
• Grant date: Mar 8, 2011
• Expiry date: Mar 5, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10F77/40

Abstract

A semiconductor structure including a first active area under which is buried a first reflective layer and a least one second active area under which is buried a second reflective layer, wherein the upper surface of the second reflective layer is closer to the upper surface of the structure than the upper surface of the first reflective layer.