High density test structure array to support addressable high accuracy 4-terminal measurements

US7902852B1 · kind B1 · utility

Assignee

• PDF SOLUTIONS, INC. · US

Inventors

• Christopher Hess · Belmont, US
• Michele Squicciarini · San Francisco, US

Key dates

• Filing date: Jul 10, 2007
• Grant date: Mar 8, 2011
• Expiry date: Jul 10, 2027

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/2884
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

Circuits for performing four terminal measurement point (TMP) testing of devices under test (DUT) is provided. The DUT and the circuit is to be defined on a semiconductor chip. The circuit includes a DUT having a first terminal and a second terminal, where the first terminal of the DUT is connectable to a first terminal measurement point and a third terminal measurement point, and the second terminal of the DUT is connectable to a second terminal measurement point and a fourth terminal measurement point. A first transistor is provided to select access to the first terminal measurement point, a second transistor is provided to select access to the third terminal measurement point, a third transistor is provided to select access to the second terminal measurement point; and a fourth transistor is provided to select access to the fourth terminal measurement point. In one example, the DUT is linked to neighboring DUTs, and selected ones of the first through fourth transistors are shared, thus reducing the number of transistors per DUT in a DUT bank, and reducing the area needed to implement DUT bank testing for addressable 4-TMP testing. The compact circuitry further enables DUT bank s…