Statistical yield of a system-on-a-chip
US7904766B1 · kind B1 · utility
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4References
20Claims
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Key dates
| Filing date | Dec 6, 2007 |
| Grant date | Mar 8, 2011 |
| Priority date | — |
| Expiry date | Mar 20, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0401
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Improving statistical yield of a system-on-a-chip. The system-on-a-chip includes several memory systems. Each memory system includes a large number of memories. The memories are tested to identify any faulty memories. One or more margins of the faulty memories are then varied and the memories are then tested again.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.