Super self-aligned trench MOSFET devices, methods, and systems
US7910439B2 · kind B2 · utility
17Cited by
21References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Feb 25, 2009 |
| Grant date | Mar 22, 2011 |
| Priority date | — |
| Expiry date | Feb 25, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/62
Abstract
A manufacturing process and design structure for a super self-aligned trench power MOSFET. A plurality of super self-aligned trenches of different depths are formed into the body layer and epitaxial layers, preferably by using a multilayer stack of dielectric material etched to form spacers. Respective trenches contain gate conductors, body-contact conductors, and preferably a third trench containing a recessed field plate. This results in a MOSFET structure having high cell density and low gate charges and gate-drain charges.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.