Processes for forming electronic devices including polishing metal-containing layers
US7915169B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 2, 2007 |
| Grant date | Mar 29, 2011 |
| Priority date | — |
| Expiry date | May 23, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/7684
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
A process of forming an electronic device can include providing a workpiece. The workpiece can include a substrate, an interlevel dielectric overlying the substrate, a refractory-metal-containing layer over the interlevel dielectric, and a first metal-containing layer over the refractory-metal-containing layer. The first metal-containing layer can include a metal element other than a refractory metal element. The process further includes polishing the first metal-containing layer and the refractory-metal-containing layer as a continuous action to expose the interlevel dielectric. In one embodiment, the metal element can include copper, nickel, or a noble metal. In another embodiment, polishing can be performed using a selectivity agent to reduce the amount of the interlevel dielectric removed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.