Patent · US Active

Asynchronous/synchronous interface

US7920431B2 · kind B2 · utility

24Cited by
5References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 2, 2008
Grant dateApr 5, 2011
Priority date
Expiry dateMar 19, 2029

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02D10/00
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

The present disclosure includes methods, and circuits, for operating a memory device. One method embodiment for operating a memory device includes controlling data transfer through a memory interface in an asynchronous mode by writing data to the memory device at least partially in response to a write enable signal on a first interface contact, and reading data from the memory device at least partially in response to a read enable signal on a second interface contact. The method further includes controlling data transfer in a synchronous mode by transferring data at least partially in response to a clock signal on the first interface contact, and providing a bidirectional data strobe signal on an interface contact not utilized in the asynchronous mode.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.