Methods of fabricating vertical JFET limited silicon carbide metal-oxide semiconductor field effect transistors
US7923320B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 21, 2007 |
| Grant date | Apr 12, 2011 |
| Priority date | — |
| Expiry date | Feb 17, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/151
Abstract
Silicon carbide metal-oxide semiconductor field effect transistors (MOSFETs) may include an n-type silicon carbide drift layer, a first p-type silicon carbide region adjacent the drift layer and having a first n-type silicon carbide region therein, an oxide layer on the drift layer, and an n-type silicon carbide limiting region disposed between the drift layer and a portion of the first p-type region. The limiting region may have a carrier concentration that is greater than the carrier concentration of the drift layer. Methods of fabricating silicon carbide MOSFET devices are also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.