Semiconductor device including high voltage and low voltage MOS devices
US7923805B2 · kind B2 · utility
4Cited by
5References
15Claims
0Family size
Assignee
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Key dates
| Filing date | Sep 19, 2006 |
| Grant date | Apr 12, 2011 |
| Priority date | — |
| Expiry date | Apr 3, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/364
Abstract
Methods and devices for forming both high-voltage and low-voltage transistors on a common substrate using a reduced number of processing steps are disclosed. An exemplary method includes forming at least a first high-voltage transistor well and a first low-voltage transistor well on a common substrate separated by an isolation structure extending a first depth into the substrate, using a first mask and first implantation process to simultaneously implant a doping material of a first conductivity type into a channel region of the low-voltage transistor well and a drain region for the high-voltage transistor well.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.