Systems, methods and devices for limiting current consumption upon power-up
US7925910B2 · kind B2 · utility
8Cited by
2References
17Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 19, 2007 |
| Grant date | Apr 12, 2011 |
| Priority date | — |
| Expiry date | Dec 30, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments are described including those for controlling peak current consumption of a multi-chip memory package during power-up. In one embodiment, each memory device of the multi-chip package includes a power level detector used to compare an internal voltage signal to a threshold. A current limiter controls the ramping rate of the internal voltage signal in response to the power level detector as the internal voltage signal ramps up towards the threshold.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.