Method of manufacturing nano-crystalline silicon dot layer
US7927660B2 · kind B2 · utility
2Cited by
5References
16Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 21, 2006 |
| Grant date | Apr 19, 2011 |
| Priority date | — |
| Expiry date | Apr 24, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/035
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a nano-crystalline silicon dot layer is provided. A silicon layer is formed over a substrate. The silicon layer includes crystalline silicon region and amorphous silicon region. An oxidation process is performed to oxidize the amorphous silicon region and the surfaces of the crystalline silicon region to form a silicon oxide layer containing nano-crystalline silicon dots.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.