Method for fabricating strained-silicon metal-oxide semiconductor transistors
US7927954B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 26, 2007 |
| Grant date | Apr 19, 2011 |
| Priority date | — |
| Expiry date | Jul 1, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/021
Abstract
A method for fabricating strained-silicon transistors is disclosed. First, a semiconductor substrate is provided and a gate structure and a spacer surrounding the gate structure are disposed on the semiconductor substrate. A source/drain region is then formed in the semiconductor substrate around the spacer, and a first rapid thermal annealing process is performed to activate the dopants within the source/drain region. An etching process is performed to form a recess around the gate structure and a selective epitaxial growth process is performed to form an epitaxial layer in the recess. A second rapid thermal annealing process is performed to redefine the distribution of the dopants within the source/drain region and repair the damaged bonds of the dopants.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.