Methods and materials useful for chip stacking, chip and wafer bonding
US7932161B2 · kind B2 · utility
10Cited by
3References
43Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 21, 2007 |
| Grant date | Apr 26, 2011 |
| Priority date | — |
| Expiry date | Oct 14, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19042
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Materials, and methods that use such materials, that are useful for forming chip stacks, chip and wafer bonding and wafer thinning are disclosed. Such methods and materials provide strong bonds while also being readily removed with little or no residues.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.