Patent · US Active

Interconnection for flip-chip using lead-free solders and having improved reaction barrier layers

US7932169B2 · kind B2 · utility

0Cited by

1References

3Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Luc Belanger · Granby, CA
Stephen L. Buchwalter · Hopewell Junction, US
Leena Paivikki Buchwalter · Hopewell Junction, US
Ajay P. Giri · Poughkeepsie, US
Jonathan H. Griffith · Hopewell Junction, US
Donald W. Henderson · Ithaca, US
Sung Kwon Kang · Chappaqua, US
Eric H. Laine · Binghamton, US
Christian Lavoie · Ossining, US
Paul A. Lauro · Nanuet, US
Valerie Oberson · Granby, CA
Da-Yuan Shih · Poughkeepsie, US
Kamalesh K. Srivastava · Wappingers Falls, US
Michael J. Sullivan · Old Lyme, US

Key dates

Filing date	Oct 5, 2009
Grant date	Apr 26, 2011
Priority date	—
Expiry date	Oct 5, 2029

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/30107
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting metallurgy including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.