Valerie Oberson
17Patents
4h-index
47Co-inventors
56Inventor score
Filing activity: Apr 28, 2004 → Jan 9, 2020
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7332424B2 | Fluxless solder transfer and reflow process | Electricity | 20 | Expired |
| US7740713B2 | Flux composition and techniques for use thereof | Electricity | 17 | Expired |
| US8003512B2 | Structure of UBM and solder bumps and methods of fabrication | Electricity | 12 | Active |
| US10580738B2 | Direct bonded heterogeneous integration packaging structures | Electricity | 4 | Active |
| US7780801B2 | Flux composition and process for use thereof | Emerging Cross-Sectional Technologies | 4 | Active |
| US8957531B2 | Flat laminate, symmetrical test structures and method of use to gauge white bump sensitivity | Electricity | 2 | Active |
| US8197612B2 | Optimization of metallurgical properties of a solder joint | Performing Operations; Transporting | 2 | Active |
| US8314500B2 | Interconnections for flip-chip using lead-free solders and having improved reaction barrier layers | Electricity | 2 | Active |
| US9579738B2 | Flux composition and techniques for use thereof | Performing Operations; Transporting | 1 | Active |
| US9815149B2 | Flux composition and techniques for use thereof | Electricity | 1 | Active |
| US8444774B2 | Flux composition and process for use thereof | Emerging Cross-Sectional Technologies | 1 | Active |
| US8268716B2 | Creation of lead-free solder joint with intermetallics | Electricity | 0 | Active |
| US11177217B2 | Direct bonded heterogeneous integration packaging structures | Electricity | 0 | Active |
| US10699972B2 | Flat laminate, symmetrical test structures and method of use to gauge white bump sensitivity | Electricity | 0 | Active |
| US9899279B2 | Flat laminate, symmetrical test structures and method of use to gauge white bump sensitivity | Electricity | 0 | Active |
| US9808874B2 | Flux composition and techniques for use thereof | Performing Operations; Transporting | 0 | Active |
| US7932169B2 | Interconnection for flip-chip using lead-free solders and having improved reaction barrier layers | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.