Multipackage module having stacked packages with asymmetrically arranged die and molding
US7932593B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 30, 2009 |
| Grant date | Apr 26, 2011 |
| Priority date | — |
| Expiry date | Apr 30, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor chip packages have die asymmetrically arranged on the respective substrates. Two such packages having complementary arrangements can be stacked, one inverted with respect to the other, such that the two die are situated side-by-side in the space between the two substrates. Also, multipackage modules include stacked packages, each having the die asymmetrically arranged on the substrate. Adjacent stacked packages have complementary asymmetrical arrangements of the die, and one package is inverted with respect to the other in the stack, such that the two die are situated side-by-side in the space between the two substrates. Also, methods are disclosed for making the packages and for making the stacked package modules.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.