Hyeog Chan Kwon
20Patents
5h-index
16Co-inventors
58Inventor score
Filing activity: Oct 29, 2004 → Jun 15, 2011
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7288835B2 | Integrated circuit package-in-package system | Electricity | 77 | Expired |
| US7737539B2 | Integrated circuit package system including honeycomb molding | Electricity | 21 | Expired |
| US8375576B2 | Method for manufacturing wafer scale heat slug system | Emerging Cross-Sectional Technologies | 11 | Active |
| US7501697B2 | Integrated circuit package system | Electricity | 10 | Active |
| US7456088B2 | Integrated circuit package system including stacked die | Electricity | 8 | Active |
| US8030134B2 | Stacked semiconductor package having adhesive/spacer structure and insulation | Electricity | 5 | Active |
| US7652376B2 | Integrated circuit package system including stacked die | Electricity | 5 | Active |
| US7975377B2 | Wafer scale heat slug system | Emerging Cross-Sectional Technologies | 4 | Active |
| US8067831B2 | Integrated circuit package system with planar interconnects | Electricity | 4 | Expired |
| US8623704B2 | Adhesive/spacer island structure for multiple die package | Electricity | 4 | Active |
| US7884460B2 | Integrated circuit packaging system with carrier and method of manufacture thereof | Electricity | 4 | Active |
| US7545031B2 | Multipackage module having stacked packages with asymmetrically arranged die and molding | Electricity | 4 | Active |
| US7755180B2 | Integrated circuit package-in-package system | Electricity | 3 | Active |
| US8552551B2 | Adhesive/spacer island structure for stacking over wire bonded die | Electricity | 2 | Active |
| US7875966B2 | Stacked integrated circuit and package system | Electricity | 2 | Active |
| US8217501B2 | Integrated circuit package system including honeycomb molding | Electricity | 1 | Active |
| US7306971B2 | Semiconductor chip packaging method with individually placed film adhesive pieces | Electricity | 0 | Expired |
| US8102043B2 | Stacked integrated circuit and package system and method for manufacturing thereof | Electricity | 0 | Active |
| US8049322B2 | Integrated circuit package-in-package system and method for making thereof | Electricity | 0 | Active |
| US7932593B2 | Multipackage module having stacked packages with asymmetrically arranged die and molding | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.