Low cost, high-density rectifier matrix memory
US7933133B2 · kind B2 · utility
2Cited by
25References
17Claims
0Family size
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Key dates
| Filing date | Nov 5, 2008 |
| Grant date | Apr 26, 2011 |
| Priority date | — |
| Expiry date | Jan 22, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/72
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A high-density memory device is fabricated three-dimensionally in layers. To keep points of failure low, address decoding circuits are included within each layer so that, in addition to power and data lines, only the address signal lines need be interconnected between the layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.