Apparatus and method for using branch prediction heuristics for determination of trace formation readiness
US7934081B2 · kind B2 · utility
5Cited by
37References
6Claims
0Family size
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Key dates
| Filing date | Oct 5, 2006 |
| Grant date | Apr 26, 2011 |
| Priority date | — |
| Expiry date | Mar 28, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/6028
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A single unified level one instruction(s) cache in which some lines may contain traces and other lines in the same congruence class may contain blocks of instruction(s) consistent with conventional cache lines. Formation of trace lines in the cache is delayed on initial operation of the system to assure quality of the trace lines stored.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.