High throughput semiconductor wafer processing
US7934898B2 · kind B2 · utility
1Cited by
14References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 16, 2007 |
| Grant date | May 3, 2011 |
| Priority date | — |
| Expiry date | Nov 12, 2029 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S414/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A wafer processing system has a wafer loading system accommodating sufficient wafer carriers to substantially maximize the processing speed capability of the processing system. Wafer carriers are placed into and removed from the loading system by one or two overhead carrier loading tracks. Carriers may be loaded or removed while other carriers are in work. One or more transfer robots may move wafers from the carriers to buffers. One or more process robots in a process module move wafers from buffers, or other locations, to processors in the process module.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.