Shielded gate trench FET with an inter-electrode dielectric having a low-k dielectric therein
US7936009B2 · kind B2 · utility
23Cited by
7References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 9, 2008 |
| Grant date | May 3, 2011 |
| Priority date | — |
| Expiry date | Jul 9, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/693
Abstract
A shielded gate trench field effect transistor (FET) comprises trenches extending into a semiconductor region. A shield electrode is disposed in a bottom portion of each trench. The shield electrode is insulated from the semiconductor region by a shield dielectric. A gate electrode is disposed in each trench over the shield electrode, and an inter-electrode dielectric (IED) comprising a low-k dielectric extends between the shield electrode and the gate electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.