System, processor, and method for incremental state save/restore on world switch in a virtual machine environment
US7937700B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 25, 2005 |
| Grant date | May 3, 2011 |
| Priority date | — |
| Expiry date | Aug 9, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/45533
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a processor comprises a plurality of registers configured to store processor state and an execution core coupled to the registers. The execution core is configured, during a switch between processor execution of a guest and processor execution of a virtual machine manager (VMM) that controls the guest, to save only a portion of the processor state to a memory. In another embodiment, a method comprises switching from processor execution of a first one of a guest and a virtual machine manager (VMM) to processor execution of a second one of the guest and the VMM, wherein the VMM controls execution of the guest; and during the switching, the processor saving only a portion of a processor state to memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.