Encapsulation method for packaging semiconductor components with external leads
US7943424B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 30, 2009 |
| Grant date | May 17, 2011 |
| Priority date | — |
| Expiry date | Jan 15, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/014
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
This invention discloses a method for packaging a semiconductor device with leads extending outside its encapsulation. The method comprises the following steps: Step 1, providing a lead frame comprising a plurality of lead frame units arranged in two dimensional array, each lead frame unit comprising a die pad and a plurality of leads located along two opposite sides of the die pad, attaching a semiconductor chip onto the die pad and electrically connecting the electrodes on each chip to its corresponding leads; Step 2, Encapsulating the chips, the die pads, and the leads with molding material into a plurality of one dimensional plastic encapsulation bars with the leads of each lead frame unit extending out along two opposite sides of the plastic encapsulation bars connecting to a plurality of tie bars substantially parallel to the plastic encapsulation bars; Step 3, Trimming off the tie bars therefore cutting off the connections between the leads to the tie bars while preserving a portion of the leads extending out of the plastic encapsulation bars; and Step 4, Sawing through the plastic encapsulation bars to form a plurality of individual semiconductor components with leads exten…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.