Forming of silicide areas in a semiconductor device
US7947583B2 · kind B2 · utility
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3References
22Claims
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Assignee
Inventors
Key dates
| Filing date | Nov 2, 2006 |
| Grant date | May 24, 2011 |
| Priority date | — |
| Expiry date | Jun 15, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0213
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An embodiment of a method for forming silicide areas of different thicknesses in a device comprising first and second silicon areas, comprising the steps of: implanting antimony or aluminum in the upper portion of the first silicon areas; covering the silicon areas with a metallic material; and heating the device to transform all or part of the silicon areas into silicide areas, whereby the silicide areas formed at the level of the first silicon areas are thinner than the silicide areas formed at the level of the second silicon areas.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.