System and method for implementing multi-resolution advanced process control
US7951615B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 1, 2009 |
| Grant date | May 31, 2011 |
| Priority date | — |
| Expiry date | Jul 8, 2029 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P90/02
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
One embodiment is a method for fabricating ICs from a semiconductor wafer. The method includes performing a first process on the semiconductor wafer; taking a first measurement indicative of an accuracy with which the first process was performed; and using the first measurement to generate metrology calibration data, wherein the metrology calibration data includes an effective portion and a non-effective portion. The method further includes removing the non-effective portion from the metrology calibration data and modeling the effective portion with a metrology calibration model; combining the metrology calibration model with a first process model to generate a multi-resolution model, wherein the first process model models an input-output relationship of the first process; and analyzing a response of the multi-resolution model and second measurement data to control performance a second process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.