Two-bit flash memory
US7956403B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 8, 2008 |
| Grant date | Jun 7, 2011 |
| Priority date | — |
| Expiry date | Sep 14, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/035
Abstract
A flash memory includes a substrate with a protrusion, a control gate, two floating gates, and a dielectric layer. The protrusion extends from a top face of the substrate. The control gate is formed on the protrusion of the substrate and extendedly covers opposite sidewalls of the protrusion. The floating gates are respectively formed on top of the protrusion and being on two opposite sides of the control gate. The dielectric layer is sandwiched the control gate and each of the two floating gates. Because of the arcuate control gate used in the flash memory, the controllability of the control gate is increased and the memory cell window is enhanced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.